New Approach in Cryptography Using RC4 Protocol

In cryptography, the RC4 protocol is the most widely used. The goal of this project is to investigate the efficient design of the RC4 stream cypher and to propose an efficient cypher architecture. The loop unrolling and pipeline concepts were used to generate two RC4 key stream bytes every clock cycle. The design is compared to prior weeks’ designs to see how many cycles are needed to finish the individual KSA and PRGA modules, as well as the RC4 Stream Cipher as a whole. The XILINX 13.2 on Vertex ML605 Evaluation FPGA Board was used to create the design.

Author (S) Details

G. V. R. Sagar
G. Pulla Reddy Engineering College (Autonomous), Kurnool, Andhra Pradesh, India.

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